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Analyzing SiP System-in-Package in the Post-Moore Era
2023-12-18
In the current post-Moore era, Sip System-in-Package technology has emerged as an innovative breakthrough in integrated circuit packaging by integrating multiple die and passive components into a single package. This technology adds a significant degree of integration to the finished chip, effectively reduces product size, and achieves certain results in reducing power consumption.
Specifically, SiP system-in-package technology integrates multifunctional devices such as processing chips, memory chips, passive components, connectors, antennas, etc. on the same substrate, and creates a module with an appearance similar to that of a single chip through a precise bonding and encapsulation process. Although still appearing chip-like, this module realizes the powerful function of multiple chips working together. This innovative system level packaging not only dramatically reduces the area of the PCB used, but also reduces the reliance on peripheral devices. More importantly, SiP system level packaging provides higher performance and lower energy consumption for devices, allowing electronic products to be compactly designed while still achieving superior functional performance.
According to Yole report, the SiP system level packaging market reached a total revenue of $21.2 billion in 2022. Driven by trends such as heterogeneous integration, core grain, package size, and cost optimization in market segments such as 5G, artificial intelligence, high-performance computing, autonomous driving, and the Internet of Things, the SiP system level packaging market is expected to reach total revenue of $33.8 billion by 2028, at a CAGR of 8.1%.
SiP system-in-package, as an integrated packaging technology, plays a key role in meeting the needs of a wide range of advanced applications. With its competitiveness of smaller, thinner, lighter and more functionality, it offers new possibilities for chip and device integration, and currently its main application areas are RF/wireless applications, mobile communications, networking devices, computers and peripherals, digital products, imaging, biological and MEMS sensors.
Solid crystal bonder (Die bonder), is the core equipment for chip placement (Die attach) in the packaging process. With the popularity of SiP system level packaging, 3D packaging and other advanced packaging, solid crystal machine equipment in the performance of a higher demand. These needs mainly include the following aspects:
1, Precision: advanced packaging for the precision requirements are very high, because the size of the chip and other devices in the package is getting smaller and smaller, while the density of the package is getting bigger and bigger. Therefore, solid crystal equipment needs to have high-precision positioning and control capabilities to ensure that each chip can be accurately placed in the intended location.
2, Speed: advanced packaging production efficiency for packaging costs and product competitiveness has an important impact. Therefore, the solid crystal equipment needs to have a high speed production capacity to improve productivity and reduce costs.
3, Yield: advanced packaging manufacturing process, any one link of error may lead to the failure of the whole package. Therefore, the solid crystal equipment needs to have a high yield production capacity to ensure the quality and reliability of the package.
4, Stable force control: in the solid crystal process, the need to apply a certain pressure on the chip to ensure a good connection between it and the substrate. However, too much pressure may lead to chip damage, while too little pressure may lead to poor connection. Therefore, solid crystal equipment needs to have a stable force control capabilities to ensure that the pressure applied to the chip is just right.
5, The temperature field and deformation control: in the solid crystal process, temperature changes and substrate deformation may affect the location of the chip and connection quality. Therefore, the solid crystal equipment needs to have the ability to control the temperature field and substrate deformation, in order to ensure the stability of the temperature and deformation in the entire solid crystal process.
Bozhon Semiconductor's FastStar series of epoxy die bonder is a high-speed, high-precision device for multi-chip packaging, with an actual placement accuracy as high as ±10μm@3σ. It adopts an open architecture and modular design, which can provide on-demand customization capability for ultimate efficiency, and can handle a maximum of 12-inch wafers by integrating the functions of dispensing, automatic knife changing, and hot-pressure lamination, which is compatible with a variety of substrate transfer modes and can meet the requirements for solid state, flip chip, SiP, and other applications. chip, SiP and other packaging processes. It solves the pain point of relying on foreign imported equipment for SiP encapsulation equipment and fills the domestic gap to a certain extent.
